Finding an Upper Bound on the Increase in Execution Time Due to Contention on the Memory Bus in COTS-Based Multicore Systems
Ref: HURRAY-TR-091102 Publication Date: 1 to 4, Dec, 2009
Finding an Upper Bound on the Increase in Execution Time Due to Contention on the Memory Bus in COTS-Based Multicore Systems
Ref: HURRAY-TR-091102 Publication Date: 1 to 4, Dec, 2009Abstract:
Contention on the memory bus in COTS based
multicore systems is becoming a major determining factor of
the execution time of a task. Analyzing this extra execution
time is non-trivial because (i) bus arbitration protocols in such
systems are often undocumented and (ii) the times when the
memory bus is requested to be used are not explicitly controlled
by the operating system scheduler; they are instead a result of
cache misses. We present a method for finding an upper bound
on the extra execution time of a task due to contention on the
memory bus in COTS based multicore systems. This method
makes no assumptions on the bus arbitration protocol (other
than assuming that it is work-conserving).
Document:
30th IEEE Real-Time Systems Symposium (RTSS 2009), ACM New York, Work-in-Progress Session.
Washington, U.S.A..
DOI:10.1145/1851166.1851172.
Record Date: 1, Nov, 2009
Short links for this page: www.cister-labs.pt/docs/10_1145_1851166_1851172 www.cister-labs.pt/docs/hurray_tr_091102 www.cister-labs.pt/docs/512