Open Questions for the Bus-Blocking Problem in the 3-Phase Task Model under Partitioned Scheduling
Ref: CISTER-TR-210503 Publication Date: 4, Jun, 2021
Open Questions for the Bus-Blocking Problem in the 3-Phase Task Model under Partitioned SchedulingRef: CISTER-TR-210503 Publication Date: 4, Jun, 2021
Modern multicore processors have the potential to provide raw computing power while being energy efficient. However, the use of multicore processors in systems with stringent timing requirements (e.g., avionics, automotive, and railways) still needs to be handled in a cautious manner. The reason for this is that, in multicore platforms, resources such as system bus, last-level cache, and main memory, are shared among all the cores. Let us consider the system bus as an example. The system bus is typically responsible for connecting all the cores to the main memory (thus, it is shared among all cores in the system). When a task wants to perform a read/write operation from/to the main memory it needs to do so by accessing the shared system bus. The direct consequence of using a shared system bus is that a task may suffer bus-blocking if the bus is already busy serving memory requests of co-running tasks (tasks running on the other cores). The 3-phase task model was introduced to reduce the unpredictability caused by shared resources in multicore systems. However, the bus-blocking can still happen when memory phases running on multiple cores wants to access the system bus at the same time instant. To analyze this, a bus blocking analysis for the 3-phase task model was proposed in the state-of-the-art. This paper highlights the open questions and possible solutions related to the bus blocking problem in the 3-phase task model under partitioned scheduling that has not been addressed in the state-of-the-art.
Accepted in CAPITAL Workshop - sCalable And PrecIse Timing AnaLysis for multicore platforms (CAPITAL 2021), Junior Presentations.