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November 2019

21, Nov, 2019

In Memoriam

Stefan M. Petters (1969-2019)

Stefan Petters was a prominent researcher at CISTER from 2009 until 2014. He was research line leader and also had the role of Vice-Director of CISTER. Stefan was an outstanding person, and his energy, wisdom, intelligence and team spirit were instrumental for the growth of CISTER-Labs. Stefan was a prominent member of the international community and his contributions will last long in the memories. Stefan sadly passed way last week, at the age of 50.

13, Nov, 2019

Achievements in Academia

Journal Paper "Empirical Performance Models of MAC Protocols for Cooperative Platooning Applications" published

The Journal Paper entitled "Empirical Performance Models of MAC Protocols for Cooperative Platooning Applications", submitted by CISTER Researchers Pedro Miguel Santos and Luis Almeida is published in Electronics (MDPI).

Vehicular ad-hoc networks (VANET) enable vehicles to exchange information on traffic conditions, dynamic status and localization, to enhance road safety and transportation efficiency. A typical VANET application is platooning, which can take advantage of exchanging information on speed, heading and position to allow shorter inter-vehicle distances without compromising safety. However, the platooning performance depends drastically on the quality of the communication channel, which in turn is highly influenced by the medium access control protocol (MAC). Currently, VANETs use the IEEE 802. 11p MAC, which follows a carrier sense multiple access with collision avoidance (CSMA/CA) policy that is prone to collisions and degrades significantly with network load. This has led to recent proposals for a time-division multiple access (TDMA)-based MAC that synchronize vehicles' beacons to prevent or reduce collisions. In this paper, we take CSMA/CA and two TDMA-based overlay protocols, i.e., deployed over CSMA/CA, namely PLEXE-slotted and RA-TDMAp, and carry out extensive simulations with varying platoon sizes, number of occupied lanes and transmit power to deduce empirical models that provide estimates of average number of collisions per second and average busy time ratio. In particular, we show that these estimates can be obtained from observing the number of radio-frequency (RF) neighbours, i.e., number of distinct sources of the packets received by each vehicle per time unit. These estimates can enhance the online adaptation of distributed applications, particularly platooning control, to varying conditions of the communication channel.

September 2019

6, Sep, 2019

Fundamental Research Activities

11th National Symposium of Informatics (INForum 2019), in Guimarães

On the 5th and 6th of September 2019, CISTER Researchers Luís Pinto and Miguel Gutiérrez Gaitán presented an oral communication and a poster at the 11th Symposium of Informatics (INForum 2019) held at the Campus Azurém of the University of Minho in Guimarães.

The article, also co-authored by CISTER members Pedro M. Santos and Luís Almeida, had the purpose of showing part of the research being done under the context of project AQUAMON, where CISTER is a partner.

In addition, the analysis presented in this work represents a relevant step on the support of real-time communications for over-water multi-hop networks affected by tides, which is one of the research challenges taken by Miguel in his Ph.D. studies.

 

 

July 2019

25, Jul, 2019

Fundamental Research Activities

Periodic Seminar on Home Appliances Energy Consumption

Yoan Caille and Rochan Ramful, two undergrad students from ESIEE Paris, visited CISTER from May to July. Their work has been developed within the context of the FLEXIGY project, where they had developed algorithms for the scheduling of home appliances energy consumption on a local smart grid. These algorithms try to maximize the use of local production from Photovoltaic Panels or any other renewable sources.
Their internship was supported by the ERASMUS initiative.

25, Jul, 2019

Fundamental Research Activities

RTSS Technical Programme Committee Meeting and RTSOPS Workshop

On July 25, CISTER Researchers Geoffrey Nelissen and Konstantinos Bletsas participated to the technical programme committee meeting of the 40th IEEE Real-TIme Systems Symposium (RTSS 2019).

The TPC meeting took place in the offices of INRIA in Paris, France. RTSS is the premier international venue for real-time systems.

On the day before the TPC meeting, both researchers also attended the RTSOPS workshop. During the workshop, sixteen short talks on open problems on real-time systems were presented by recognized researchers from the real-time systems community.

25, Jul, 2019

Fundamental Research Activities

25th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications in Hangzhou

CISTER Researchers Eduardo Tovar and Ali Awan attended the 25th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2019) in Hangzhou, China.

Eduardo Tovar was General Co-Chair and Steering Committee member and Ali Awan presented the paper entitled "Memory Bandwidth Regulation for Multiframe Task Sets" in the main conference.

It is the goal of the RTCSA to bring together researchers and developers from academia and industry to promote cross-fertilization and discuss advances and trends in the technology of embedded and real-time systems and their emerging applications, including the Internet of Things and Cyber-Physical Systems.

 

24, Jul, 2019

Fundamental Research Activities

KhronoSim Final Evaluation meeting in Coimbra

On July 24, CISTER Researcher Cláudio Maia attended the final evaluation meeting for the KhronoSim project.
In this meeting two evaluators assessed the project in terms of achieved objectives and results. After careful evaluation and discussion, the project was deemed a success as all the objectives for the project were achieved, resulting in the development of two demonstrators for the KhronoSim test platform: an automotive instrument cluster and a satellite.
In the project, among other tasks, the CISTER team was responsible for studying the state of the art of emulation for multicore systems and integrating the KhronoSim test platform with the selected emulator. The emulator selected for the project was QEMU, one of the most versatile emulators currently available in the market, on top of which CISTER developed the KhronoSim QEMU Module that allows one to instance, manage and control, via the KhronoSim platform, several QEMU instances.

12, Jul, 2019

Fundamental Research Activities

31st Euromicro Conference on Real-Time Systems, ECRTS 2019, in Stuttgart, Germany

4, Jul, 2019

Fundamental Research Activities

Distinguished Seminar on the Internet-of-Things (IoT) and Artificial Intelligence (AI)

4, Jul, 2019

Industry Collaborations

CISTER Researchers participated in TECH@PORTUGAL at Âlfandega do Porto

June 2019

28, Jun, 2019

Achievements in Academia

CISTER PhD Students were awarded the best oral presentation and best poster award at DCE 2019

27, Jun, 2019

Industry Collaborations

H2020: Infoday Digital Transformation

P.Porto received, on June 27th, the event entitled H2020: Infoday Digital Transformation, promoted by the National Innovation Agency (ANI), together with the Polytechnic Institute of Porto (P.Porto), TICE.PT and ISCTE-IUL.
The session was attended by Lars Pedersen from DG CONNECT, European Commission, who gave a presentation on the latest H2020 calls that will support digital transformation.
CISTER Research Centre premises were the venue for the event "Eyes on Horizon Europe: How to look at opportunities in crossover areas such as Space and ICT" in which several researchers had the opportunity to discuss possible application topics to be completed by the end of the H2020 program in order to promote national participation in the European research program, particularly in the area of ICT (Information and Communications Technology)."

26, Jun, 2019

Fundamental Research Activities

Periodic Seminar on Wireless Sensor Networks (WSN)

21, Jun, 2019

Fundamental Research Activities

Coordination 2019 conference and SC meeting in Copenhagen

CISTER was involved in the Conference on Coordination Models and Languages (Coordination 2019), the top venue in the community that investigates abstractions that cleanly separate behaviour from communication, therefore increasing modularity, simplifying reasoning, and ultimately enhancing software development. Coordination is one of the three conferences of DisCoTec - one of the major events sponsored by IFIP, on distributed computing techniques.
Its 21st edition took place in Copenhagen, 19-21 June 2019, where the CISTER researcher José Proença participated in the Steering Committee meeting to discuss the future of the conference, and presented his work on coordination on a real-time operating system.

18, Jun, 2019

Fundamental Research Activities

Distinguished Seminar on Communications for Satellites

11, Jun, 2019

Fundamental Research Activities

REASSURE progress meeting at U.Minho

On the 11th of June, CISTER Researchers David Pereira and Giann Nandi have participated in a progress meeting of REASSURE, that took place in the premises of the Department of Informatics of University of Minho.
The meeting, which counted also with the participation of REASSURE’s team members José Bacelar Almeida and Jorge Sousa Pinto from HASLab/ INESC TEC, had the purpose of analyzing the results obtained by both teams in this first year of REASSURE, and to plan the next steps for the second year of activities of the project, notably in what concerns the design of Domain Specific Languages and Cyber-Security Support in the design of runtime monitoring architectures.

Particular focus on the work developed by Giann, under his PhD studies, on the formal verification of WSN protocols using the ProVerif Tool, which is the core result described in the paper entitled “Security in Wireless Sensor Networks: A formal verification of protocols” that has been recently accepted in this year’s edition of INDIN 2019 – 17th IEEE International Conference on Industrial Informatics.

7, Jun, 2019

Fundamental Research Activities

Visit from Serbian Researcher of the RT-RK National Research Institute

7, Jun, 2019

Fundamental Research Activities

General Assembly and F2F meeting of the project SCOTT in Gdansk, Poland

6, Jun, 2019

Fundamental Research Activities

Periodic Seminar on "Effective System Integration"

May 2019

27, May, 2019

Fundamental Research Activities

Periodic Seminar on Thermal-Aware Scheduling

24, May, 2019

Industry Collaborations

THERMAC physical kick-off meeting at CISTER

21, May, 2019

Industry Collaborations

Portugal Space visit to Airbus Defence and Space (ADS)

21, May, 2019

Activities in the Academia

HDR examination of Luca Santinelli

Last 20th of May, at the ENSEEIHT in Toulouse, CISTER Vice-Director Luis Almeida participated in the HDR examination (Habilitation à Diriger de Recherche) of Luca Santinelli, a well-known member of the real-time systems community, based at ONERA, working essentially on probabilistic methods for the estimation of the worst-case execution and response times.
The examination focused on the research path of the candidate and his research perspectives for the future.
Beyond Luis Almeida, the examination committee included Alan Burns U.York,UK; Isabelle Puaut, U.Rennes, FR; Laurent George, ECE, FR; Yves Sorel, INRIA, FR; Joel Goossens, ULB, BE and Christian Fraboul, U.Toulouse, FR.
 

19, May, 2019

Fundamental Research Activities

Another Successful Industry-Driven Project delivered

17, May, 2019

Fundamental Research Activities

Final Event of the ENABLE-S3 project in Graz, Austria

8, May, 2019

Industry Collaborations

VORTEX General Assembly

The first VORTEX General Assembly was held at the CISTER Labs on the 8th of May, alongside with VORTEX Bootcamp.
This first General Assembly was mainly to ratify changes in the association bylaws proposed by the supervisory board, to name the members of the assembly and elect members of the VORTEX Scientific Council.
After discussing the overall charter and proposed changes, the assembly approved by unamity those changes.
The General Assembly is thus constituted by Jaime Medeiros - President (Altran/CRALaw); Nuno Correia - Secretary (NOVALINCS/UNL) and Paulo Gandra de Sousa - Secretary (CISTER/ISEP).
CISTER Researchers David Pereira and Ricardo Severino were appointed as members of the VORTEX Scientific Council and Eduardo Tovar was appointed as President of the VORTEX Scientific Council.
After this formality, the assembly members discussed about the future of the association based on the briefing of the bootcamp.

7, May, 2019

Industry Collaborations

VORTEX Bootcamp in CISTER

April 2019

23, Apr, 2019

Activities in the Academia

Open Debate Session about "Plasticology" at Porto Design Factory

23, Apr, 2019

Fundamental Research Activities

Periodic Seminar on Security in Embedded Systems

11, Apr, 2019

Fundamental Research Activities

Periodic Seminar on "the Interaction-Centric Paradigm"

1, Apr, 2019

Fundamental Research Activities

Distinguished seminar on Model-Driven Engineering

March 2019

29, Mar, 2019

Industry Collaborations

VORTEX, the Collaborative Laboratory in CPS, was officially launched

27, Mar, 2019

Fundamental Research Activities

+Science +Europe

21, Mar, 2019

Activities in the Academia

A Machine Learning challenge was won by CISTER interns

19, Mar, 2019

Fundamental Research Activities

PhD student from Universidad de Alcalá invited to give a talk on "Digital Communications for the Control of Modular Multilevel Converters" at CISTER

Tomás Corrêa gave a talk on “Digital Communications for the Control of Modular Multilevel Converters” on the 19th of March, at CISTER/FEUP. Tomás is a PhD student at the Universidad de Alcalá de Henares in Spain and started by explaining the concept of Modular Multilevel Converter (MMC) and how it impacted the conversion and control of electrical energy at high voltage levels. MMCs, invented in 2001, are composed of a potentially large number of power modules, as known as cells, that are stacked and switched on and off individually to generate a voltage wave with a desired shape, typically sinusoidal. The cells are controlled centrally but individual connections to the controller can limit scalability and hinder MMCs applicability. Thus, Tomas focused on the current trend toward using digital communications in MMCs and told us about the benefits and challenges this trend implies, particularly concerning the trade-off between latency, reliability and cost. Among different alternatives, Ethernet technology connected in a ring topology stands up, currently, as the best compromise essentially due to the high reliability-cost ratio and despite the relatively high latency it implies. Tomas shared with us, then, his research on Ethernet-based ring networks to bring latency to a minimum, designing specific protocols, namely TTRing and DiSortNet, for specific distributions of the MMC control, that reduce by one half the best latency achievable with current COTS technology, supporting 400 nodes with cycle times below 200us.

PHOTOS:
At CISTER's Facebook Page / At CISTER's Instagram Page

12, Mar, 2019

Fundamental Research Activities

Training on "Introduction to Real-time Systems"at CISTER Facilities

8, Mar, 2019

Fundamental Research Activities

CISTER Researchers attended the seminar on "Analysis, Design, and Control of Predictable Interconnected Systems"

7, Mar, 2019

Fundamental Research Activities

Pedro Miguel Santos gave a talk on Vehicular Networking and Urban Sensing Platforms

1, Mar, 2019

Fundamental Research Activities

Two new PhD members recently joined CISTER

February 2019

21, Feb, 2019

Fundamental Research Activities

Scientific Council Meeting