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Best Paper Award at RAGE2022

25, Jul, 2022

The paper entitled "Minimal-Overlap Centrality-Driven Gateway Designation for Real-Time TSCH Networks" presented by CISTER PhD student Miguel Gutiérrez Gaitán got the "Best Paper Award" at the first edition of the Real-time And intelliGent Edge computing (RAGE 2022) workshop.

The event was part of the 59th DAC (Design Automation Conference) held between July 10-14 in San Francisco, USA, one of the top-notch conferences in the area of embedded systems. Particularly, the workshop captured the attention of more than +50 attendees working around the intersection of cutting-edge fields such as edge computing, real-time networks and intelligent systems.

The paper co-authored by Miguel Gutiérrez Gaitán, Pedro M d'Orey, Pedro M. Santos and Luís Almeida, is a follow-up of a paper recently awarded at the 17th Internation Conference on Wireless Communication Systems (WFCS 2021) where we first introduced the concept of centrality-driven gateway designation for improved traffic schedulability in wireless sensor networks (WSNs). This new paper proposes a novel centrality metric for gateway designation which outperforms state-of-the-art centrality metrics.

Selected authors and speakers of the workshop are now invited to submit an extended contribution to the Special Issue on Real-Time Computing in the IoT-to-Edge-to-Cloud Continuum on ACM Transactions on Embedded Computing Systems (ACM TECS).